Chenhao (Vito) Wu

Short Bio

I am a first year Ph.D. student at the Chinese University of Hong Kong, under the supervision of Prof. Guoliang Xing. My research primarily dedicates to some of the technically challenging problems in the broad area of computer systems.

Prior to my Ph.D. study, I received my bachelor degree in Computer Science and Engineering from the Chinese University of Hong Kong, Shenzhen. During my bachelor study, I have directed a number of software implementations that basically in collaborations with my colleagues to bring algorithms in fields of information theory, coding theory and cryptography into actual implementations.

I found my interest in building real systems and administering all details related to it (e.g., arch, interfaces, networks, operating systems, analysis and verifications). In particular, my recent research concentrates on measuring, designing, and optimizing ways contemporary network stack (i.e., OS, NIC, protocols) interact with applications in other disciplines.

Research Interests

Computer Architecture Networked Systems DesignOperating Systems Design

Skills

  • Linux Kernel C/C++
  • x86/ARM/GPU Assembly
  • SSE/AVX2/AVX512 SIMD
  • CUDA, OpenCL, OpenGL
  • Python, Perl
  • OpenMP, MPI, Pthread, Athread
  • Vtune, gprof, Valgrind
  • VHDL, Verilog
  • 802.11/LTE Protocol Stack
  • BGP, SDN, RDMA
  • JavaScript, Flask, MySQL
  • git, perforce, gdb

Education

The Chinese University of Hong Kong
Sha Tin, N.T., Hong Kong
August 2021 - Present

Industrial Experiences

GPU Architect, Streaming Multi-Processor Team
April 2020 - November 2020
  • Investigate and propose architectural ideas based on quantitative study of existing and projected SM architecture.
  • Develop performance and functional simulation models.
  • Develop performance and functional test plans to validate new SM architectural features.
  • Test and debug on simulators, RTL and real silicon.

Research Experiences

Founder and Leader
September 2019 - February 2021
Established a team of 16 undergraduate students for HPC related research. Built up the infrastructure (a mini cluster) with team members and participated in several top-tier student supercomputing competitions.
  • Orchestrated weekly seminars for sharing state-of-the-art HPC system designs.
  • Optimized a parallel quantum computer simulater QUEST by reducing the cache-miss rate and introducing AVX2/AVX512 vectorization (in ASC20-21).
  • Led team to win 3 second prizes in 2020-2021 ASC student cluster competitions.
Research Assistant, System Developer
July 2018 - August 2019
Participated in the development of a new wireless multi-hop protocol.
  • Designed and implemented the routing system of BATS protocol.
  • Produced throughput and latency testings for tuning the internal parameters of BATS protocol.
  • Implemented a multi-hop video streaming demo on BATS protocol.
  • Assembled and deployed 16 roadside units with basic computing and communication capability.