Chenhao (Vito) Wu

Short Bio

I am a second year Ph.D. student at the Chinese University of Hong Kong, under the supervision of Prof. Guoliang Xing. My past experience lies in GPU architectural design (GA102/GH102 ISA), and 802.11/LTE/5G protocol design and performance tunning (PHY/MAC).

Prior to my Ph.D. study, I received my bachelor degree in Computer Science and Engineering from the Chinese University of Hong Kong, Shenzhen.

Research Interests

Networked Operating Systems Cross-layer Protocol Design and Applications Binary Security

Skills

  • Linux Kernel C/C++
  • x86/ARM/GPU Assembly
  • SSE/AVX2/AVX512 SIMD
  • CUDA, OpenCL, OpenGL
  • Python, Perl
  • OpenMP, MPI, Pthread, Athread
  • Vtune, gprof, Valgrind
  • VHDL, Verilog
  • 802.11/LTE Protocol Stack
  • BGP, SDN, RDMA
  • JavaScript, Flask, MySQL
  • git, perforce, gdb

Education

The Chinese University of Hong Kong
Sha Tin, N.T., Hong Kong
August 2021 - Present

Industrial Experiences

GPU Architect, Streaming Multi-Processor Team
April 2020 - November 2020
  • Investigate and propose architectural ideas based on quantitative study of existing and projected SM architecture.
  • Develop performance and functional simulation models.
  • Develop performance and functional test plans to validate new SM architectural features.
  • Test and debug on simulators, RTL and real silicon.

Research Experiences

Research Assistant, System Developer
July 2018 - August 2019
Participated in the development of a new wireless multi-hop protocol.
  • Designed and implemented the routing system of BATS protocol.
  • Produced throughput and latency testings for tuning the internal parameters of BATS protocol.
  • Implemented a multi-hop video streaming demo on BATS protocol.
  • Assembled and deployed 16 roadside units with basic computing and communication capability.